Low Complex Interoperable GNSS Signal Processor and its Performance

P. Kovar, P. Kacmarik, F. Vejrazka

Abstract:	The recent development of the GNSS systems and international cooperation resulted in important technical problems of the GNSS systems which are an interoperability and compatibility. In the interoperable receivers the most expensive parts – front ends – can be shared for signals reception of different systems. The unification of the signal processor is also possible with some small performance deterioration but the hardware complexity reduction is considerable. The paper analyses applicability of a classical E-L correlator for processing of various GNSS signals and compare its performance with optimal method. The low complex interoperable processor of software receiver based on a FPGA for the GPS, Galileo and GLONASS systems is proposed. The results of testing on the Galileo E1 and E5 signals are presented. The last part of the paper proposes architecture of a low cost multi system GNSS receiver based on mass market components.
Published in:	Proceedings of IEEE/ION PLANS 2010 May 4 - 6, 2010 Renaissance Esmeralda Resort & Spa Indian Wells, CA
Pages:	947 - 951
Cite this article:	Kovar, P., Kacmarik, P., Vejrazka, F., "Low Complex Interoperable GNSS Signal Processor and its Performance," Proceedings of IEEE/ION PLANS 2010, Indian Wells, CA, May 2010, pp. 947-951. https://doi.org/10.1109/PLANS.2010.5507229
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