Compact, Low-Power Chip-Scale Atomic Clock

J.F. DeNatale, R.L. Borwick, C. Tsai, P.A. Stupar, Y. Lin, R.A. Newgard, R.W. Berquist and M. Zhu

Abstract:	We have successfully demonstrated a compact atomic frequency standard, the Chip-Scale Atomic Clock (CSAC), which achieves aggressive reductions in size and power while preserving good short-term stability. The device, based on Coherent Population Trapping (CPT), achieved volume less than 1cm3, power consumption below 30mW, and an Allan Deviation less than 1x10-11 (1hour). This device incorporated a novel dual-pass reflective optical configuration based on a microstructured dualfocus optic. Compact, low-power control electronics were developed based on an injection-locked voltage controlled oscillator (VCO) circuit. This approach enabled the combined power consumption of the VCO and microcontroller-based control electronics to be kept below 15mW.
Published in:	Proceedings of IEEE/ION PLANS 2008 May 6 - 8, 2008 Hyatt Regency Hotel Monterey, CA
Pages:	67 - 70
Cite this article:	DeNatale, J.F., Borwick, R.L., Tsai, C., Stupar, P.A., Lin, Y., Newgard, R.A., Berquist, R.W., Zhu, M., "Compact, Low-Power Chip-Scale Atomic Clock," Proceedings of IEEE/ION PLANS 2008, Monterey, CA, May 2008, pp. 67-70. https://doi.org/10.1109/PLANS.2008.4570007
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