A FPGA-based Software GPS Receiver Implementation Using Simulink and Xilinx System Generator

Hun-Soo Cho, Sung-Hyuck Im and Gyu-In Jee

Abstract:	Recently, some software based GPS receivers have been developed and they are often implemented on PC under Windows and C language environments. Even though it could successfully track GPS signals and calculate user position in real time, the computational time for the signal acquisition and tracking is still massive for totally software only GPS receiver. If additional signal processing is required for multipath mitigation, interference cancellation, and weak signal detection etc, more computational power must be provided FPGA/DSP based approach is one promising solution for the advanced SDR GPS receiver. In this paper we develop a FPGA-based software GPS receiver using a high –level design tool. We use a Simulink and Xilinx System Generator for the GPS receiver baseband signal processing design. The signal processing components that require massive computation, for example, correlator, C/A code generator, DCO are designed by the Xilinx FPGA block and implemented on FPGA board. The other parts are implemented by software PC. An interference mitigation technique using a temporal adaptive filtering is developed and implemented on this FPGA-based GPS receiver. The performance of the designed receiver is presented.
Published in:	Proceedings of the 18th International Technical Meeting of the Satellite Division of The Institute of Navigation (ION GNSS 2005) September 13 - 16, 2005 Long Beach Convention Center Long Beach, CA
Pages:	234 - 240
Cite this article:	Cho, Hun-Soo, Im, Sung-Hyuck, Jee, Gyu-In, "A FPGA-based Software GPS Receiver Implementation Using Simulink and Xilinx System Generator," Proceedings of the 18th International Technical Meeting of the Satellite Division of The Institute of Navigation (ION GNSS 2005), Long Beach, CA, September 2005, pp. 234-240.
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