PALINURO ... A Single Chip GPS Receiver -RF, DSP, CPU, ROM, RAM All on One Piece of Silicon

Philip G. Mattos and Giuseppe Gramegna

Abstract:	A single chip GPS, RF and all digital on one piece of silicon, is presented. While multi-chip modules or stacked-die have been seen before, and host based or externally booted implementations, this is believed to be the first standalone single chip device allowing an active antenna to be connected on one side and a serial port for PVT solution output on the other. Analogue RF and digital baseband on the same die present serious noise problems for the sensitive radio, and sophisticated techniques are described to achieve co-habitation, including designing overload tolerant RF stages with fully differential interconnection, using RF compatible packages, minimising digital off-chip signals such as buses, choosing a frequency plan where processor harmonics cannot enter the IF stages, and implementing an isolation zone between the RF and baseband sections of the silicon. The single chip GPS allows any board designer to put commodity GPS into his product, with only a single RF connection to engineer, the antenna input, without the added costs of a bought-in module.
Published in:	Proceedings of the 17th International Technical Meeting of the Satellite Division of The Institute of Navigation (ION GNSS 2004) September 21 - 24, 2004 Long Beach Convention Center Long Beach, CA
Pages:	1501 - 1506
Cite this article:	Mattos, Philip G., Gramegna, Giuseppe, "PALINURO ... A Single Chip GPS Receiver -RF, DSP, CPU, ROM, RAM All on One Piece of Silicon," Proceedings of the 17th International Technical Meeting of the Satellite Division of The Institute of Navigation (ION GNSS 2004), Long Beach, CA, September 2004, pp. 1501-1506.
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