Report on a Single Chip MSK Radionavigation Beacon Receiver Simulation

John Cameron and Erlend Olson

Abstract:	This paper describes the development of an optimized architecture for an Application Specific Integrated Circuit (ASIC) designed to receive the United States Coast Guard Differential Global Positioning System (DGPS) signals. The optimization criteria in this design are to fully meet or exceed the United States Coast Guard (USCG) specifications as well as to minimize power consumption and space requirements for the circuit. Extensive HSPICE modeling based on ASIC foundry models is employed to determine realistic limits of on-chip performance. The architecture analysis results in a proposed design that employs the use of a mixed-signal ASIC with a full-custom analog front-end and a digital signal processing back-end. The receiver architecture was simulated using custom C programs and commercial mathematical modeling software. The simulation results of this design are presented graphically at virtual test points, relevantly situated for various critical signal scenarios. Analysis of the simulation demonstrates how a single-chip implementation effectively handles real world disturbances such as impulse noise (man-made and atmospheric), adjacent or near channel interferers, transmitter drift, and low Signal to Noise Ratio (SNR) conditions while still maintaining the required operational performance.
Published in:	Proceedings of the 1996 National Technical Meeting of The Institute of Navigation January 22 - 24, 1996 Loews Santa Monica Hotel Santa Monica, CA
Pages:	843 - 853
Cite this article:	Cameron, John, Olson, Erlend, "Report on a Single Chip MSK Radionavigation Beacon Receiver Simulation," Proceedings of the 1996 National Technical Meeting of The Institute of Navigation, Santa Monica, CA, January 1996, pp. 843-853.
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