Architecture and Performance of a New GPS Time Transfer and Positioning Receiver

T.I. Kido, P.C. Ould, R.J. Van Wechel

Abstract: This paper describes the Interstate Electronics 4200 GPS Receiver System that has been developed for time transfer and low dynamic positioning applications. The receiver employs the NAVSTAR Global Positioning System (GPS) L1 CIA-code and has three optional solution modes for the clock/navigation state estimation: - A time transfer-only mode while tracking at least one satellite, with a solution set containing user-clock and oscillator-bias states. Typically this mode can be used for about 12 hours per day with the current NAVSTAR GPS satellite constellation. - A two-dimensional (2-D) navigation-plus-time transfer mode, with a solution set containing clock and oscillator bias, plus user latitude and longitude states. This mode is operable on three satellites simultaneously, which makes it usable for about 4 hours per day with the current GPS constellation. - A three-dimensional (3-D) navigation-plus-time transfer mode, with a solution set as for 2-D except for the addition of an altitude state, making it usable for about 2 hours per day at present. The system consists of a separate preamplifier/antenna and processing unit (5-114 inches high by 17-114 inches wide by 24 inches deep). The processor has the following four circuit board assemblies: (1) an RF converter that converts the preamplifier output to baseband for digitizing; (2) a digital signal processor containing a digital correlator, numerically controlled oscillators, and a code generator; (3) a tracking controller equipped with a user clock, digital phase-stepper that fully synchronizes the 1-pps output signal to the nanosecond level, and a microprocessor that operates in conjunction with the signal processor to close the tracking loops; and (4) a data processor for executive control, input/output management, and clock/navigation state estimation, The processing unit can optionally use either an external frequency reference or its own crystal oscillator. The control/display unit, which is built into the processor's front panel, has a four-line, 40-character liquid crystal display and a 4x4 keypad for mode control and data input. Standard computer interfaces are included. The paper also summarizes the results of system performance in terms of both single- and multiple-satellite operation.
Published in: Proceedings of the 14th Annual Precise Time and Time Interval Systems and Applications Meeting
November 30 - 3, 1982
NASA Goddard Space Flight Center
Greenbelt, Maryland
Pages: 495 - 516
Cite this article: Kido, T.I., Ould, P.C., Van Wechel, R.J., "Architecture and Performance of a New GPS Time Transfer and Positioning Receiver," Proceedings of the 14th Annual Precise Time and Time Interval Systems and Applications Meeting, Greenbelt, Maryland, November 1982, pp. 495-516.
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