Abstract: | Due to software's superior adaptability over hardware, it is being used increasingly often in new receiver designs, and especially in GNSS receivers. Each increase in computing capacity or advance in Analog to Digital Converter (ADC) technology brings the ADC closer to the antenna. In fact, analog correlators now no longer exist. Next to disappear will undoubtedly be Intermediate Frequency (IF) translation stages as sampling frequencies high enough to allow RF Direct Sampling (DS) are already available on the market. Finally the analog Automatic Gain Control (AGC) will give way to a digital one in light of the upcoming availability of a sufficient number of quantification bits required to linearly quantize the full range of input signal. The complete Software Defined Radio (SDR) seems to be in view: an antenna, an ADC and a processor. However, even if technology rapidly keeps its promises, and permits such a design for mass market GNSS receivers for which operational robustness is a not necessarily a key point, additional difficulties are expected for more demanding applications. In particular, for Civil Aviation purposes, GNSS receivers must meet the stringent requirements found in standards, for instance, the Galileo and GPS Minimum Operational Performance Specifications (MOPS). Among the most severe requirements, are the interference levels the receiver must withstand without degradation of its operational capability. As an illustration, it is noted that at the input of the receiver the dynamic range between useful signals and CW interference can reach 50 dB for the L1/E1 band. For the L5/E5a, band the situation is no better because this dynamic range, with the cumulation of in-band Distance Measuring Equipment (DME) ground emissions, can be as high as 30 dB. Taking these requirements as design specifications, we proposed in previous papers two different SDR DS GNSS receiver architectures for Civil Aviation, using both L5/E5 and L1/E1 bands. We targeted a final objective of “neither AGC nor IF”. The first solution has one global channel leading to one ADC digitizing the input signal to provide as output a signal including both L5/E5 and L1/E1 bands very close to each other. The second solution has one channel per band each ending with an ADC. Nevertheless, whatever the solution, we highlighted the necessity of a minimal RF hardware element consisting of amplifiers and filters before the ADC, in order to meet the interference requirements. We displayed the minimum transfer function of these filters and also quantified the minimal specifications of the digitization process. This was achieved by calculating sampling frequencies and numbers of quantification bits required to encompass the whole amplitude dynamic range including the strongest interference. The aim of this article is to extend the study of DS SDR architectures for Civil Aviation GNSS receivers. More specifically we will address two points. The first relates to the high binary throughput, which results from the digitization process and is necessary to reflect all interference levels. We will propose methods to minimize this throughput in order to lower the workload of signal processing tasks, preserving the signal. The second point we will study is specific to the first proposed architecture. It consists in determining a process to digitally separate L5/E5 and L1/E1 bands, sub-sampled in one block with the lowest sampling frequency and so closely aliased, whilst keeping out-of-band interference at a low power. In the first part of this paper we will present the context of Civil Aviation GNSS receivers, focusing on requirements regarding robustness against interference. We will display interference masks at the antenna port specified in the MOPS. They define the maximal power of the interfering signals below which all the minimum performance requirements must be met. Taking into account the minimum required selectivity of the on-board active antenna we will then be able to deduce the interference masks at the receiver input. In a second section we will review the two Direct Sampling architectures we previously elaborated from these second level masks, identifying the essential minimal RF hardware element and recalling the minimum values of sampling frequencies/number of quantification bits we calculated. We will then present in a third section methods to minimize the bit rate immediately after the ADC. On average we would expect good data economy because most of the time the interference threat will be absent. In the applicable cases, we will also assess the corresponding degradation of the Signal to Noise Ratio. In a fourth section we will detail the separation process of L5/E5 and L1/E1 bands in the architecture where they are sampled together. That is we have to design sharp filters which not only select each band but also protect it from possible interference present in the other band. Finally we will establish the degradation of the Signal to Noise Ratio against interference at the output of correlators and compare results to those of a classical architecture. |
Published in: |
Proceedings of the 26th International Technical Meeting of the Satellite Division of The Institute of Navigation (ION GNSS+ 2013) September 16 - 20, 2013 Nashville Convention Center, Nashville, Tennessee Nashville, TN |
Pages: | 182 - 196 |
Cite this article: | Blais, A., Macabiau, C., Julien, O., "Matched Quantization and Band Separation in a Direct Sampling Dual Band GNSS Receiver for Civil Aviation," Proceedings of the 26th International Technical Meeting of the Satellite Division of The Institute of Navigation (ION GNSS+ 2013), Nashville, TN, September 2013, pp. 182-196. |
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