Abstract: | Global Navigation Satellite System (GNSS) simulator is an effective and efficient means for testing and performance evaluation of GNSS receiver during the latterĀ“s design and manufacturing phase. GNSS simulator allows repeatable and completely controlled test environment which ensures the efficiency of the development of a GNSS receiver. One of the critical segments of a GNSS simulator is the continuous resampling of the satellite data that is done to incorporate the Doppler effects. The continuous resampling on multiple satellite signals to create a cumulative RF signal is a heavily intensive process. As the data size increases, so is the impact on the resampling process. As the number of satellites increases, the amount of processing increases too. Achieving computational performance improvements in this area is essential for achieving high throughputs which in turn enable us to stream multi-GNSS simulator signals. One of the big debates in the scientific community has been centered around the use of CPUs vs DSPs vs FPGAs. With more and more powerful CPUs with multiple cores entering the market and with their ease of programming, questions have been raised on whether we can continue using more and more powerful CPUs and avoid steep learning curves associated with the FPGA programming. This paper demonstrates the performance improvements achieved in the resampling process by using the simple symmetries in the spreading code of navigation signal. By using the code information, efficient resampling has been done without the need for unwanted filtering. Also, the repetition aspects of the spreading code have been used to achieve further performance improvements. The algorithms have been implemented completely on multi-core PXI Express (PXIe) controller systems. The new simplified and efficient algorithms have been implemented using the software languages LabVIEW and C++. In addition to algorithm improvements, several software optimization techniques have been tested. Some of these software optimizations included the use of OpenMP, Concurrency Loops and Parallel For Loops. This paper presents the results in the form of throughput rates achieved with the increasing number of satellites across multi-core CPU (dual, quad, octo) controllers. The CPU utilizations and the performance metrics are presented for the cases where multiple software optimizations like OpenMP and Concurrency Loops have been used. Finally we outline the scope for future work and lay the path to experiments with other optimization methodologies such as using SSE instructions and Intel Performance Primitives. |
Published in: |
Proceedings of the 25th International Technical Meeting of the Satellite Division of The Institute of Navigation (ION GNSS 2012) September 17 - 21, 2012 Nashville Convention Center, Nashville, Tennessee Nashville, TN |
Pages: | 157 - 160 |
Cite this article: | Nerella, P.K., Chaddha, V., Desai, S.K., Vadlamani, S., Gopinath, C., "Algorithm and Software Design Tricks and Methods for Multi GNSS Simulator Design," Proceedings of the 25th International Technical Meeting of the Satellite Division of The Institute of Navigation (ION GNSS 2012), Nashville, TN, September 2012, pp. 157-160. |
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