DIGITAL PHASE PROCESSING FOR LOW-COST OMEGA RECEIVERS

D. B. Cox, Jr., E. V. Harrington, Jr., W. H. Lee and W. M. Stonestreet

Peer Reviewed

Abstract: Under a continuing program sponsored by the Air Force Avionics Laboratory, a variety of new phase-processing techniques have been developed at the Charles Stark Draper Laboratory [l, 2, 3, 4]. Recently, special types of digital-phase-locked loops [3, 4] have been developed and appear to offer special advantages when applied to radio-navigation receivers and timing receivers. One of these loops, which is referred to asa serial digital phases&r (SDPF), appears to be so simple in construction and useful in application as to be worth producing as a basic LSI building block. In this paper, the application of the SDPF to Omega receivers is explored. It is shown that the internal functions of an Omega receiver can be organized to take advantage of one or ‘more SDPF’s used in combination with an LSI microprocessor. The SDPF’s can be used to reduce the load on the microprocessor by reducing the bandwidth of the phase data being presented to it. The SDPF’s can also accomplish demodulation and analog-to-digital conversion, thereby eliminating the need for special circuitry to perform these functions. Because of the reduction in data bandwidth, there is an increase in efficiency and productivity of the microprocessor. The processing efficiency of the entire receiver is then more closely maximized with respect to hardware and software cost. The design approach is applicable to a bare-bones receiver, which would incorporate the most elementary and inexpensive microprocessor or no microprocessor at all, or to a high-performance airborne receiver where a variety of sophisticated functions must be performed automatically by the microprocessor. The paper is divided into five main sections. First, the organization of the receiver is described and the advantages of the recommended approach are pointed out. Then the SDPF is described in detail. Then the hardware developed for laboratory demonstration is described. The tracking performance of the receiver is discussed next, and theoretical and experimental data are provided for illustration. Finally, procedures for automatic synchronisation are described and supported by experimental data. Some important areas, such as lane identification, propagation prediction, antenna design, etc., are treated only lightly as being more relevant to specific designs than to the problem of reducing cost by improving the efficiency of phase processing.
Published in: NAVIGATION, Journal of the Institute of Navigation, Volume 22, Number 3
Pages: 221 - 234
Cite this article: Cox, D. B., Jr.,, Harrington, E. V., Jr.,, Lee, W. H., Stonestreet, W. M., "DIGITAL PHASE PROCESSING FOR LOW-COST OMEGA RECEIVERS", NAVIGATION, Journal of The Institute of Navigation, Vol. 22, No. 3, Fall 1975, pp. 221-234.
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