CRPA Delay and Jitter Characterization for Timing Systems using the Jitterbug Measurement System
Wil Myrick, Charlie Vines, Nicholas Pinco, Scott Frushon, ENSCO, Inc.; Gary Deuel, USfalcon, Inc.; James Patterson, US Space Force
Location: Ballroom C
Date/Time: Monday, Jun. 12, 2:50 p.m.
Controlled Reception Pattern Array (CRPA) technology provides a way for homeland critical infrastructure timing systems to protect the integrity of their timing signals against a variety of threats. While CRPA technology provides a level of protection for these timing systems it is important to understand and quantify the delay and GNSS receiver jitter characterization impacted from leveraging CRPA technology. We present the development of a portable Commercial-of-the-Shelf (COTS) timing measurement and data collection system to support the installation and monitoring of Controlled Reception Pattern Array (CRPA) technology based on Python algorithms for high-precision clock analysis to assist in CRPA delay and jitter characterization.
This timing measurement system known as Jitterbug leverages readily available COTS components to support clock analysis for a variety of timing signals (e.g. 10MHz, PPS, and IRIG). In this presentation we show how GNSS receivers combined with Jitterbug can be used to characterize the delay and jitter associated with a group of CRPAs. A subset of these CRPAs is then exposed in the PNTAX 2022 threat environment to explore quantifying the CRPA nulling performance with respect to jitter. The setup and results associated with both CRPA delay characterization and jitter measurements before and after being exposed to the PNTAX 2022 threat environment will be discussed during this presentation.
The Jitterbug timing measurement system is centered around a Raspberry Pi 4 Single Board Computer (SBC) that has been integrated into the pi-top  COTS Computer. This pi-top  COTS computer provides a mobile computing platform for Python algorithm development while providing a built-in Organic Light-Emitting Diode (OLED) display and buttons to remove the need to have a mouse and a monitor for generating and saving timing measurements in the field. It provides a flexible platform for measuring the CRPA as well as cabling delay associated with a GNSS receiver system that is part of the infrastructure timing system. This timing measurement system utilizes a low Size, Weight, Power, and Cost (SWaP-C) Tucson Amateur Packet Radio (TAPR) Time Interval Clock Counter (TICC) enabling Python algorithms to consume TICC phase information impacted by the CRPA processing stream. A custom Jitterbug Raspberry Pi Hat hardware module was developed to add a Real-time Clock as well as a reprogrammable 10 MHz timing source for the TICC to support system mobility. Since the 10 MHz clock serves only as a transfer standard its quality has minimal impact on the Jitterbug measurement results needed for CRPA delay and jitter estimates. This timing measurement system was developed to keep equipment costs at a minimum while maintaining portability and flexibility to support various types of delay and jitter measurements throughout the critical infrastructure timing system.
The Jitterbug Python software architecture for clock analysis and timing applications leverages conventional Python scientific libraries as well as CircuitPython libraries to provide a flexible programming architecture for clock generation and clock analysis. CircuitPython is used to program and control an inexpensive external 10 MHz clock needed by the TICC. The fusion of CircuitPython with conventional Python scientific libraries present a unique programming architecture to develop timing applications using Python related libraries to control both the clock generating hardware and signal processing timing algorithms. Standard Python libraries are used to read and process data from the TICC providing delay and jitter measurements with better than 60 picosecond resolution and less than 100 picosecond jitter. Python software was also developed so Jitterbug can be completely controlled from the external buttons integrated into the pi-top  case as part of the OLED assembly making it easy to see CRPA delay and jitter measurements.
The Python timing application to be discussed during this presentation involves jitter and delay estimation associated with CRPAs and cable assemblies. We show how two GNSS receivers, a TICC, and Jitterbug can be used to make an accurate delay estimate associated with a CRPA antenna and cable assembly. A discussion of how this configuration was extended to measure jitter during the PNTAX 2022 event will also be discussed showing the flexibility of the measurement architecture. We show that Jitterbug provides a flexible and mobile measurement development platform for timing applications involving delay and jitter measurements based on readily available COTS components and Python modules.