Felix Vietmeyer, JILA, University of Colorado; Judah Levine, JILA, University of Colorado And Time and Frequency Division, NIST Boulder

View Abstract Sign in for premium content


We have developed a time server based on field-programmable gate array (FPGA) hardware. The device responds to requests for time in NTP format. The system is implemented on two FPGA boards. One of the boards responds to requests for time in the standard NTP format, and the second board supports the generation of time stamps in NTP format from hardware signals at 1 pps and 10 MHz. These signals are produced by the local clock ensemble, which realizes UTC(NIST) with an uncertainty of a few ns. The conversion between the input signals and NTP time format is realized by using only integer addition and subtraction – no multiplication, no division, and no floating-point operations are used. The system responds to a time request in 330 ns, so that it can respond to several million requests per second. The 1Gb/s circuits that we currently use at multiple locations to support the time service can transmit somewhat more than 1 million NTP requests per second in principle, although the actual throughput is less than this value. The single FPGA system can therefore support all of the NTP requests at each location. (The requests are currently handled by multiple commercial servers.) The control and supervision of the hardware is implemented on a separate circuit that uses a Universal Serial Bus (USB) connection. The network interface does not support any control or maintenance functions, so that the system cannot be modified by using a remote attack. The processing time of the system is fast enough so that it cannot be compromised by the denial-of-service attacks that are often used against our existing time service because the denial-of-service attack is limited by the capacity of the 1 Gb/s network connection. We have measured the accuracy and the stability of the time stamps generated by the FPGA board by using a direct hard-wired link between the FPGA system and a standard time server that is synchronized to the same hardware signals that are the references for the FPGA. This time server is dedicated to the performance test. We have realized an accuracy and stability on the order of microseconds in this best-case configuration. This accuracy is unlikely to be realized on a multi-user network; the accuracy on a public network will continue to be determined, and generally limited, by the characteristics of the network connection. The FPGA implementation does not respond to requests that are not consistent with the NTP format definition, and ignores requests to any other port in any other format. In addition to improving the security of the time service by using a separate USB serial connection for command and control, the hardware costs less than 10% of the cost of one of our existing time servers, which use general-purpose computer systems.