Session P3a: Low-SWaP Clocks and Oscillators

CSAC 2.0 – On the Road Towards Lower SWaP-C
Michael Silveira, Peter Cash, Lichung Ha, Ali Darvishian, Dan Boschen, Daniel Aleksa, Luan Vo, and Mark Trainoff, Microchip/FTS; Mark Mescher, Draper; Darwin Serkland, Sandia; Wenqi Zhu, NIST
Location: Seaview A/B
Date/Time: Wednesday, Jan. 29, 2:12 p.m.

Chip-Scale Atomic Clock (CSAC) technology enables atomic-quality timing in portable battery-powered devices. CSAC enables novel architectures and topologies for critical position, navigation, and timing (PNT) applications. Since the release of the model SA.45s CSAC in 2011, and its successor the SA65s in 2021, Microchip Frequency and Time Systems (FTS) has shipped over 150,000 CSACs to customers utilizing its unique capabilities everywhere from ocean bottom sensors to low Earth orbiting space vehicles. However, further widespread adoption of CSAC into certain industries has been limited by its relatively high manufacturing cost.
The CSAC 2.0 Technology Investment Agreement (TIA) between Microchip/FTS and the Army Research Laboratory (ARL), with partial funding from OSD/MSTP, has the primary objective of developing manufacturing capability to ultimately deliver one million CSACs per year at an average selling price of approximately $300. While not altering the fundamental device physics, which has demonstrated sufficient performance to meet most DoD requirements, the first two phases of the project are revisiting the architecture, components, and manufacturing processes that comprise the CSAC with the objective of reducing cost and improving yield.
At PTTI 2025, Microchip/FTS will present the latest developments of the CSAC 2.0 program. These developments cover the initial prototype builds and testing of the latest iteration of the Horizontal Inline Physics Package (HIPP), which includes advancements in atomic vapor cell manufacturing, new beam forming and polarization optics, and updates to the design of the isolation suspensions.
These developments will also cover the first electronics and software platform that incorporates a new microwave synthesizer application-specific integrated circuit (Synth ASIC). This new Synth ASIC contains the entire microwave synthesis chain, with precise frequency and amplitude control, in an ultra-low power, low cost, 16mm2 chip package. In addition, a plan for development of a mixed signal ASIC (MS ASIC) that will include multiple digital-to-analog converters, analog-to-digital converters, voltage/current drivers, photo-signal detectors, time interval counters, and more will also be presented.