Presented to: Dr. Andrew Dempster
Citation: For fundamental contributions to GNSS receiver architectures and signal processing; and interference detection, characterization, and mitigation
Dr. Andrew Dempster has been involved with satellite navigation since 1988. From 1988-1992, he was project manager and system engineer developing Australia’s first satellite navigation receiver at Auspace Limited used for the first GNSS tracking of a road vehicle in Australia and then in the UK in 1991. The unique receiver design was acquired by Sigtech Navigation (later Signav), and subsequently by u-blox. The Signav receiver, using his designs, was recorded in the GPS World Receiver Survey as having the world’s best reacquisition performance for four years. This was due to the unique openloop signal tracking, co-developed by Dr. Dempster.
Professor Dempster developed a GNSS receiver design and signal processing postgraduate course at the University of Westminster in London (1995-2004) that was taught every year there, and later at University of New South Wales (UNSW). Short courses derived from that course (on receiver design, signal processing, and interference/ vulnerability – a total number of ~50) have been delivered in five countries. He taught satellite navigation for 13 consecutive years at Astrium/Airbus, where Galileo was initially developed, and his instruction has influenced the developers of the Galileo space segment.
In 2004, he was recruited to UNSW as director of research in the School of Surveying, to lead and provide signal processing expertise to development of its proposed FPGA-based GPS receiver. In 2024, that program is now in its sixth generation, with a four input CubeSat formfactor receiver currently under development. Two generations have operated in space, with a total of 12 receivers being launched. Two CubeSats launched in August 2024 both carry reflectometry instruments using fifth generation receivers and are being commissioned at the time of writing.
Dr. Dempster received his PhD in Signal Processing Arithmetic Circuits for Implementation in VLSI from the University of Cambridge in 1995.